Digital Logic Design – Digital Electronics MCQs Set-14 Contain the randomly compiled Digital Logic Design MCQs from various reference books and Questions papers for those who is preparing for the various Competitive Exams,Interviews and University Level Exams.
PRACTICE IT NOW TO SHARPEN YOUR CONCEPT AND KNOWLEDGE
1. When more than one input can be active, the priority ____________ must be used.
- Terms
- Words
- Encoder
- None of the above
C. Encoder
2. The Boolean expression for the multiplexer can be derived by the inspection method.
- 6×1
- 3×1
- 5×1
- 4×1
D. 4×1
3. _________________ multiplexers can be constructed from smaller ones
- Small
- Larger
- Dimultiplexers
- All of the above
B. Larger
4. A _________________ is a circuit, which can remember values for a long time or change values when required
- Logical Circuit
- Digital Circuit
- Memory Element
- Complex Circuit
C. Memory Element
5. A ________________ circuit is not suitable in the synchronous circuit design because of its transparency nature
- Latch
- Parallel
- Diagonal Circuit
- None of the above
A. Latch
6. There are________________ basic types of flip-flop based on clock trigger.
- 2
- 6
- 8
- 4
D. 4
7. The characteristic equation of any flip-flop describes the __________________ of the next state in terms of the present state and inputs.
- Impact
- Behavior
- Path
- None of the above
B. Behavior
8. The normal data inputs to a flip-flop (D, S and R, J and K, T) are referred to as ________________ inputs
- Sequential
- Asynchronous
- Synchronous
- Both (A) and (B)
C. Synchronous
9. Asynchronous inputs, just like synchronous inputs, can be engineered to be ______________.
- Active-Medium
- Active-Low
- Active-High
- Both (B) and (C)
D. Both (B) and (C)
10. ___________ and Clear should not be 0 at the same time; otherwise, both the outputs will be 1, which is known as invalid state.
- Preset
- Post set
- Fixed
- Both (A) and (B)
A. Preset
