Question-1 Explain Memory-Mapped I/O
- Each device controller has a few registers that are used for communicating with the CPU.
- By writing into these registers, the OS can command the device to deliver data, accept data, switch itself on or off, or perform some action.
- By reading from these registers OS can learn what the device’s status is, whether it is prepared to accept a new command and so on.
- There are two ways to communicate with control registers and the device buffers
- I/O Port.
- Memory mapped I/O.
- Each control register is assigned an I/O port number, an 8 or 16 bit integer.
- The set of all the I/O ports form the I/O port space and is protected so that ordinary user program cannot access it.
- Memory mapped I/O is an approach to map all the control registers into memory space.
- Each control register is assigned a unique memory address to which no memory is assigned, this system is called memory mapped I/O.
- Generally assigned addresses are at the top of the address space.
- When CPU wants to read a word, either from memory or an I/O port, it puts the address it needs on the bus’ address lines and then issues a READ signal on bus’ control line.
- A second signal line is used to tell whether I/O space or memory space is needed.
- If it is memory space, the memory responds to the request. If it is I/O space, the I/O device responds to the request.
Figure (a) Separate I/O and memory space. (b) Memory-mapped I/O. (c) Hybrid.
- With memory mapped I/O, device control registers are just variables in memory. So with memory mapped I/O device drivers can easily be written in ‘C’ like languages, no assembly code is required to access registers.
- No special protection mechanism is needed to keep user processes from performing I/O.
- With memory-mapped I/O, every instruction that can reference memory can also reference control registers.
- Most computers nowadays have some form of cashing of memory words. Cashing a device control registers would create problems, cashing needs to be disabled in paging system.
- If there is only one address space, then all memory modules and all I/O devices must examine all memory reference to see which ones to respond to.